Pro catalog
Interface Protocols
UART, SPI, I2C, and other serial or peripheral protocol interfaces.
Category overview
UART, SPI, I2C, and other serial or peripheral protocol interfaces.
IP blocks
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Combinational 1-bit pin driver with direction control; output follows data_in or drives low in input mode.
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Memory-mapped 32-bit GPIO with chip-select, DI readback of gpio_in, and byte-strobed DO register writes.
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Register-mapped 8-bit GPIO with per-pin direction, data registers, and rising-edge interrupt generation.
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Detects I2C bus idle conditions based on SCL and SDA levels with configurable threshold.
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Detects I2C Start and Stop conditions synchronously on the SCL rising edge.
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Synthesizable IEEE 1149.1 JTAG TAP Controller with 32-bit DR and IR paths.
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A lightweight I²C master controller supporting Standard Mode (100 kHz) with configurable clock parameters and basic transaction control.
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A lightweight I²C slave controller that translates I²C read/write operations into simple register file transfers with clock stretching support.
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Minimal SPI master for CPOL=0, CPHA=0, 8-bit transfers with start/done handshake.
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SPI host/controller operating in CPOL=0 CPHA=0 with 8-bit shift frames.
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SPI Mode-3 Slave (CPOL=1, CPHA=1) 8-Bit
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Synthesizable SPI slave with ready/valid byte interface, LSB-first Mode 0 shifting, and chip-select framed transfers.
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A synthesizable 8-N-1 UART with valid/ready TX/RX handshakes and parameterizable baud timing.
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8N1 UART Core with Configurable Depth TX and RX FIFOs. Supports backpressure and interrupt-ready status flags.