Part 0 · Platform Recap
SoC map & mini_soc tour
1 0.1 SOC PLATFORM TOUR Coming soon RISC-V System Class | 0.1 SoC platform tour | RTLStudioRTLStudio·Coming soon · daily upload
Replace stub with rv32i_core
2 0.2 STUB TO CORE Coming soon RISC-V System Class | 0.2 Stub to core swap | RTLStudioRTLStudio·Coming soon · daily upload · Swap the fixed cpu_stub master for rv32i_core_bus and prove it runs.
Part 1 · Core on Bus (MMIO)
LSU to AXI-Lite master FSM
3 1.1 LSU AXI LITE Coming soon RISC-V System Class | 1.1 LSU AXI-Lite master | RTLStudioRTLStudio·Coming soon · daily upload
Connect to soc decode fabric
4 1.2 CONNECT SOC DECODE Coming soon RISC-V System Class | 1.2 Connect soc decode | RTLStudioRTLStudio·Coming soon · daily upload
MMIO load/store timing
5 1.3 MMIO LOAD STORE Coming soon RISC-V System Class | 1.3 MMIO load store | RTLStudioRTLStudio·Coming soon · daily upload
ROM/RAM/CSR region map
6 1.4 ROM RAM CSR Coming soon RISC-V System Class | 1.4 ROM RAM CSR map | RTLStudioRTLStudio·Coming soon · daily upload
Link script to .hex layout
7 1.5 LINK SCRIPT HEX Coming soon RISC-V System Class | 1.5 Link script hex | RTLStudioRTLStudio·Coming soon · daily upload
Bus + MMIO subsystem top
8 1.6 BUS MMIO TOP Coming soon RISC-V System Class | 1.6 Bus MMIO top | RTLStudioRTLStudio·Coming soon · daily upload
Part 2 · Peripheral Programs
GPIO output .hex
9 2.1 GPIO OUTPUT HEX Coming soon RISC-V System Class | 2.1 GPIO output hex | RTLStudioRTLStudio·Coming soon · daily upload
GPIO input poll loop
10 2.2 GPIO INPUT POLL Coming soon RISC-V System Class | 2.2 GPIO input poll | RTLStudioRTLStudio·Coming soon · daily upload
Timer delay loop
11 2.3 TIMER DELAY LOOP Coming soon RISC-V System Class | 2.3 Timer delay loop | RTLStudioRTLStudio·Coming soon · daily upload
UART status poll TX
12 2.4 UART STATUS TX Coming soon RISC-V System Class | 2.4 UART status TX | RTLStudioRTLStudio·Coming soon · daily upload
Multi-peripheral sequence
13 2.5 MULTI PERIPH SEQUENCE Coming soon RISC-V System Class | 2.5 Multi-periph sequence | RTLStudioRTLStudio·Coming soon · daily upload
Program integration lab
14 2.6 PROGRAM INTEGRATION LA Coming soon RISC-V System Class | 2.6 Program integration lab | RTLStudioRTLStudio·Coming soon · daily upload
Part 3 · Interrupts & DMA
IRQ vector table .hex
15 3.1 IRQ VECTOR TABLE Coming soon RISC-V System Class | 3.1 IRQ vector table | RTLStudioRTLStudio·Coming soon · daily upload
Timer IRQ handler
16 3.2 TIMER IRQ HANDLER Coming soon RISC-V System Class | 3.2 Timer IRQ handler | RTLStudioRTLStudio·Coming soon · daily upload
Sticky IRQ status and clear
17 3.3 GPIO IRQ CHANGE Coming soon RISC-V System Class | 3.3 GPIO IRQ change | RTLStudioRTLStudio·Coming soon · daily upload
DMA descriptor kick (CSR)
18 3.4 DMA DESCRIPTOR KICK Coming soon RISC-V System Class | 3.4 DMA descriptor kick | RTLStudioRTLStudio·Coming soon · daily upload
Core idle + DMA fill
19 3.5 CORE IDLE DMA Coming soon RISC-V System Class | 3.5 Core idle DMA fill | RTLStudioRTLStudio·Coming soon · daily upload
IRQ + DMA subsystem top
20 3.6 IRQ DMA TOP Coming soon RISC-V System Class | 3.6 IRQ DMA top | RTLStudioRTLStudio·Coming soon · daily upload
Part 4 · Pipeline
Single-cycle vs pipeline
21 4.1 SINGLE VS PIPELINE Coming soon RISC-V System Class | 4.1 Single vs pipeline | RTLStudioRTLStudio·Coming soon · daily upload
IF/ID pipeline registers
22 4.2 IF ID PIPELINE Coming soon RISC-V System Class | 4.2 IF ID pipeline regs | RTLStudioRTLStudio·Coming soon · daily upload
EX/MEM/WB stages
23 4.3 EX MEM WB Coming soon RISC-V System Class | 4.3 EX MEM WB stages | RTLStudioRTLStudio·Coming soon · daily upload
Data hazard detect
24 4.4 DATA HAZARD DETECT Coming soon RISC-V System Class | 4.4 Data hazard detect | RTLStudioRTLStudio·Coming soon · daily upload
Forwarding unit
25 4.5 FORWARDING UNIT Coming soon RISC-V System Class | 4.5 Forwarding unit | RTLStudioRTLStudio·Coming soon · daily upload
Load-use stall & flush
26 4.6 LOAD USE STALL Coming soon RISC-V System Class | 4.6 Load-use stall flush | RTLStudioRTLStudio·Coming soon · daily upload
Part 5 · System Capstone
rv32_soc_top hierarchy
27 5.1 RV32 SOC TOP Coming soon RISC-V System Class | 5.1 rv32_soc_top | RTLStudioRTLStudio·Coming soon · daily upload
Pipeline core option mux
28 5.2 PIPELINE CORE OPTION Coming soon RISC-V System Class | 5.2 Pipeline core option | RTLStudioRTLStudio·Coming soon · daily upload
End-to-end system TB
29 5.3 SYSTEM E2E TB Coming soon RISC-V System Class | 5.3 System e2e TB | RTLStudioRTLStudio·Coming soon · daily upload
Ultimate rv32_soc
30 5.4 ULTIMATE RV32 SOC Coming soon RISC-V System Class | 5.4 Ultimate rv32_soc | RTLStudioRTLStudio·Coming soon · daily upload