{ "version": 1, "sets": [ { "id": "quick_start", "tier": "basic", "requiresAuth": false, "title": "Quick start", "blurb": "FSM counter: one edit in the editor, a lint fix, then sim + waveform scopes, synth diagrams, and VCD → Waveform editor (see README).", "fileOrder": [ "rtl.f", "tb.f", "tb/testbench.v", "rtl/design.v" ] }, { "id": "export_import_tour", "tier": "basic", "requiresAuth": false, "title": "Export & Import a workspace", "blurb": "Guided tour: edit the decoder, export the workspace to a ZIP, then import it back (see README).", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_decoder.v", "rtl/decoder_3to8.v" ] }, { "id": "save_share_tour", "tier": "basic", "requiresAuth": true, "title": "Save, Share & Load workspaces", "blurb": "Guided tour: edit the FSM counter, save to a cloud slot, share/unshare, then load from another slot (see README).", "fileOrder": [ "rtl.f", "tb.f", "tb/testbench.v", "rtl/design.v" ] }, { "id": "starter", "tier": "basic", "requiresAuth": false, "title": "Starter — TB + DUT", "blurb": "Initial workspace template: rtl.f + tb.f, DUT in design.v, testbench.v — run lint, sim, waveforms, and synthesis.", "fileOrder": [ "rtl.f", "tb.f", "tb/testbench.v", "rtl/design.v" ] }, { "id": "hello_sim", "tier": "basic", "requiresAuth": false, "title": "Hello simulation", "blurb": "Minimal $display smoke test — confirm Simulation log prints hello world.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb.v", "rtl/hello.v" ] }, { "id": "lint_warnings", "tier": "basic", "requiresAuth": false, "title": "Lint — warnings (sim OK)", "blurb": "Intentional Slang-style warnings only; simulation and synthesis still succeed.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb.v", "rtl/lint_warn_dut.v" ] }, { "id": "lint_errors", "tier": "basic", "requiresAuth": false, "title": "Lint — errors (fix to run)", "blurb": "Deliberate default_nettype error — Lint shows red; sim/synth fail until you remove one assign (see README).", "fileOrder": [ "rtl.f", "tb.f", "tb/tb.v", "rtl/lint_err_dut.v" ] }, { "id": "lint_filelist", "tier": "basic", "requiresAuth": false, "title": "Lint / build — missing filelist entry", "blurb": "alpha.v instantiates beta.v but rtl.f omits it — fix the filelist to elaborate.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb.v", "rtl/alpha.v", "rtl/beta.v" ] }, { "id": "decoder_3to8", "tier": "basic", "requiresAuth": false, "title": "3-to-8 decoder", "blurb": "Combinational one-hot decoder — no clock, good second step after Starter.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_decoder.v", "rtl/decoder_3to8.v" ] }, { "id": "traffic_light", "tier": "basic", "requiresAuth": false, "title": "Traffic light FSM", "blurb": "RED → GREEN → YELLOW → RED with simple timers — easy to read in the waveform viewer.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_traffic_light.v", "rtl/traffic_light.v" ] }, { "id": "counter_nbit", "tier": "basic", "requiresAuth": false, "title": "N-bit counter", "blurb": "Width from define.vh (`RTL_COUNTER_N`) — one knob for sim, synth, and TB.", "fileOrder": [ "rtl.f", "tb.f", "rtl/define.vh", "tb/tb_counter.v", "rtl/counter.v" ] }, { "id": "edge_detector", "tier": "basic", "requiresAuth": false, "title": "Edge detector", "blurb": "Rising/falling one-shots — classic handshake glue; clear one-cycle pulses in waves.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_edge.v", "rtl/edge_detector.v" ] }, { "id": "sync_fifo", "tier": "basic", "requiresAuth": false, "title": "Sync FIFO (4-deep)", "blurb": "Small synchronous FIFO — enqueue / dequeue handshake.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_fifo.v", "rtl/sync_fifo.v" ] }, { "id": "async_fifo_cdc", "tier": "basic", "requiresAuth": false, "title": "Async FIFO (CDC)", "blurb": "Dual-clock gray-pointer FIFO — compare wr_clk vs rd_clk in the waveform viewer.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_cdc.v", "rtl/async_fifo_cdc.v" ] }, { "id": "dumpvars_scope", "tier": "basic", "requiresAuth": false, "title": "$dumpvars scope practice", "blurb": "Start with dumpvars depth 1 (ports only), then switch to depth 0 to reveal internals.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_dump.v", "rtl/dump_dut.v" ] }, { "id": "clk_div_pwm", "tier": "basic", "requiresAuth": false, "title": "Clock divider + PWM", "blurb": "Divider and duty-cycle PWM — change level mid-sim and watch waves.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_pwm.v", "rtl/clk_div_pwm.v" ] }, { "id": "wavedrom_from_sim", "tier": "basic", "requiresAuth": false, "title": "VCD → Waveform Editor", "blurb": "Short pulse FSM dump — practice Simulation → Waveform → Waveform Editor.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_pulse.v", "rtl/pulse_gen.v" ] }, { "id": "wavedrom_hand", "tier": "basic", "requiresAuth": false, "title": "Hand-written WaveDrom", "blurb": "Edit simulation/wavedrom.json for Waveform Editor without needing a fresh VCD first.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_dummy.v", "rtl/dummy.v", "simulation/wavedrom.json" ] }, { "id": "fsm_packet_tx", "tier": "basic", "requiresAuth": false, "title": "Packet TX FSM", "blurb": "Control-heavy transmitter FSM for FSM extraction/diagram testing.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_packet_tx.v", "rtl/packet_tx_fsm.v" ] }, { "id": "priority_encoder", "tier": "basic", "requiresAuth": false, "title": "Priority encoder", "blurb": "Combinational 8→3 encoder — Circuit Schematic stays readable.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_pe.v", "rtl/priority_encoder.v" ] }, { "id": "ram_sp_32x8", "tier": "basic", "requiresAuth": false, "title": "RAM 32×8 (single-port)", "blurb": "Small synchronous single-port SRAM pattern — write then read back in TB.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_ram.v", "rtl/ram_sp_32x8.v" ] }, { "id": "alu64_datapath", "tier": "basic", "requiresAuth": false, "title": "64-bit ALU datapath", "blurb": "Arithmetic + logic + barrel shifts with wider datapath resources.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_alu64.v", "rtl/alu64.v" ] }, { "id": "latch_trap", "tier": "basic", "requiresAuth": false, "title": "Latch trap (incomplete if)", "blurb": "Incomplete always @(*) on purpose — synth/lint latch warnings; fix by adding a default.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_latch.v", "rtl/latch_trap.v" ] }, { "id": "mac_array_16x16", "tier": "basic", "requiresAuth": false, "title": "MAC array 16x16", "blurb": "Large multiply-accumulate array for high cell count.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_mac_array.v", "rtl/mac_array.v" ] }, { "id": "crossbar_8x8_32b", "tier": "basic", "requiresAuth": false, "title": "Crossbar 8×8 (32b)", "blurb": "Wide mux fabric that synthesizes to large combinational logic.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_crossbar.v", "rtl/crossbar_8x8.v" ] }, { "id": "pipe_adder", "tier": "basic", "requiresAuth": false, "title": "Pipelined adder", "blurb": "2-stage 16-bit adder — compare FF count before/after removing pipeline regs.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_pipe.v", "rtl/pipe_adder.v" ] }, { "id": "apb_regs", "tier": "basic", "requiresAuth": false, "title": "APB register bank", "blurb": "Tiny APB-like slave with four 32-bit registers.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_apb.v", "rtl/apb_regs.v" ] }, { "id": "axi_lite_min", "tier": "basic", "requiresAuth": false, "title": "AXI4-Lite mini slave", "blurb": "Thin AW/W/B + AR/R into four regs — watch valid/ready handshakes in waves.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_axil.v", "rtl/axi_lite_min.v" ] }, { "id": "arbiter_rr", "tier": "basic", "requiresAuth": false, "title": "Round-robin arbiter", "blurb": "Four requesters with rotating grants — hold req=1111 and watch gnt walk.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_arb.v", "rtl/arbiter_rr.v" ] }, { "id": "uart_tx", "tier": "basic", "requiresAuth": false, "title": "UART TX (bit-bang)", "blurb": "8N1 transmitter at 1 clock/baud — decode start/data/stop on the tx line.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_uart.v", "rtl/uart_tx.v" ] }, { "id": "wrong_top", "tier": "basic", "requiresAuth": false, "title": "Wrong top / multiple DUTs", "blurb": "Two counters in one workspace — switch Synthesis top between core_a and core_b.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_wrong_top.v", "rtl/core_a.v", "rtl/core_b.v" ] }, { "id": "multi_module", "tier": "basic", "requiresAuth": false, "title": "Multi-module filelist + include", "blurb": "Healthy hierarchy top_wrap\to mid\to leaf with a shared header in rtl.f.", "fileOrder": [ "rtl.f", "tb.f", "rtl/pkg_types.vh", "rtl/leaf.v", "rtl/mid.v", "rtl/top_wrap.v", "tb/tb_multi.v" ] }, { "id": "readme_diagrams", "tier": "basic", "requiresAuth": false, "title": "README diagrams (Mermaid + WaveDrom)", "blurb": "Docs pane renders Mermaid and WaveDrom fences; optional blink sim.", "fileOrder": [ "rtl.f", "tb.f", "tb/tb_blink.v", "rtl/blink.v" ] } ] }