# Quick start

> Tiny FSM + 3-bit counter: edit **`design.v`**, run **Lint**, **Simulation**, and **Synthesis** — then send **`sim/dump.vcd`** to the Waveform editor.

## Files

| File | Role |
|------|------|
| `rtl/design.v` | **`fsm_counter`** (starts with intentional lint-ish issues for the tour) |
| `tb/testbench.v` | **`tb`** — clock/reset, VCD dump |
| `rtl.f` / `tb.f` | Filelists |

## Guided edits (in-app tour)

1. **Editor:** Set **`K_IDLE_GOAL`** to **`3'd0`** (from **`3'd7`**), save (**Ctrl+S**).
2. **Lint:** Fix the reset width issue — e.g. **`cnt <= 3'd0;`** instead of a too-wide literal.
3. **Simulation:** Run TB, then **Waveform** → expand **`tb`** and add scopes/signals.
4. **Synthesis:** Run, then open **Block / FSM / Schematic** for **`fsm_counter`**.
5. **Waveform editor:** Explorer → right-click **`sim/dump.vcd`** → **Send to Waveform editor**.

Shared workflow notes append below this README. **Starter — TB + DUT** is the recommended initial project template (file lists + full workflow).